T-H Juang

Tzung-Han Juang

Hi! I am a PhD Candidate in the Department of Electrical and Computer Engineering (ECE) at McGill University.

My PhD is supervised by Christophe Dubach.

My current project focuses on high-level hardware generation of neural network accelerators on Field Programmable Gate Array (FPGA) devices. Our approaches are based on functional intermediate representations (IRs), which provide a convenient way to express parallelism and data dependency. I am also interested in topics related to Hardware Design, Compilers, and Machine Learning.

My previous projects include reinforcement learning for production line management (at Northwestern University) and hardware design for convolutional neural network accelerators (at National Taiwan University). I also had summer internships at Intel (for code optimization and machine learning) and Mediatek (as a hardware engineer).




Presentations and Posters


Contact: tzung-han.juang at mail.mcgill.ca